PIC16C6X
FIGURE 5-12: PARALLEL SLAVE PORT WRITE WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
FIGURE 5-13: PARALLEL SLAVE PORT READ WAVEFORMS
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
CS
WR
RD
PORTD<7:0>
IBF
OBF
PSPIF
TABLE 5-13: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
Address Name Bit 7 Bit 6 Bit 5
Bit 4
Bit 3 Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on all
other resets
08h
PORTD PSP7 PSP6 PSP5 PSP4 PSP3 PSP2 PSP1 PSP0 xxxx xxxx uuuu uuuu
09h
PORTE —
—
—
—
—
RE2 RE1
RE0 ---- -xxx ---- -uuu
89h
TRISE
IBF OBF IBOV PSPMODE — PORTE Data Direction Bits
0000 -111 0000 -111
0Ch
PIR1
PSPIF (1) RCIF(2) TXIF(2) SSPIF CCP1IF TMR2IF TRM1IF 0000 0000 0000 0000
8Ch
PIE1
PSPIE (1) RCIE(2) TXIE(2) SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by the PSP.
Note 1: These bits are reserved, always maintain these bits clear.
2: These bits are implemented on the PIC16C65/65A/R65/67 only.
DS30234D-page 62
© 1997 Microchip Technology Inc.