PIC16LC64-20/SP View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16LC64-20/SP Datasheet PDF : 336 Pages
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PIC16C6X
TABLE 10-5: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Addr
Name
Bit 7 Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on: Value on
POR, all other
BOR
Resets
0Bh,8Bh INTCON
10Bh,18Bh
0Ch
0Dh(4)
PIR1
PIR2
8Ch
8Dh(4)
87h
PIE1
PIE2
TRISC
GIE
PEIE
T0IE
PSPIF(2)
(3)
RCIF(1)
—
—
PSPIE(2)
(3)
—
RCIE(1)
—
—
—
PORTC Data Direction register
INTE
TXIF(1)
—
TXIE(1)
—
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
SSPIF
—
SSPIE
—
CCP1IF
—
CCP1IE
—
TMR2IF
—
TMR2IE
—
TMR1IF 0000 0000 0000 0000
CCP2IF ---- ---0 ---- ---0
TMR1IE 0000 0000 0000 0000
CCP2IE ---- ---0 ---- ---0
1111 1111 1111 1111
11h
TMR2
Timer2 module’s register
0000 0000 0000 0000
92h
PR2
Timer2 module’s Period register
1111 1111 1111 1111
12h
T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
15h
CCPR1L Capture/Compare/PWM1 (LSB)
xxxx xxxx uuuu uuuu
16h
CCPR1H Capture/Compare/PWM1 (MSB)
xxxx xxxx uuuu uuuu
17h
CCP1CON —
—
CCP1X CCP1Y CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
1Bh(4)
CCPR2L Capture/Compare/PWM2 (LSB)
xxxx xxxx uuuu uuuu
1Ch(4)
CCPR2H Capture/Compare/PWM2 (MSB)
xxxx xxxx uuuu uuuu
1Dh(4)
CCP2CON —
—
CCP2X CCP2Y CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000
Legend:
Note 1:
2:
3:
4:
x = unknown, u = unchanged, - = unimplemented locations read as '0’. Shaded cells are not used in this mode.
These bits are associated with the USART module, which is implemented on the PIC16C63/R63/65/65A/R65/66/67 only.
Bits PSPIE and PSPIF are reserved on the PIC16C62/62A/R62/63/R63/66, always maintain these bits clear.
The PIR1<6> and PIE1<6> bits are reserved, always maintain these bits clear.
These registers are associated with the CCP2 module, which is only implemented on the PIC16C63/R63/65/65A/R65/66/67.
DS30234D-page 82
© 1997 Microchip Technology Inc.
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