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PIC16C774T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16C774T-I/SO
Microchip
Microchip Technology 
PIC16C774T-I/SO Datasheet PDF : 202 Pages
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PIC16C77X
FIGURE 9-8: ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
RC7/RX/DT (pin)
Start
bit bit0 bit1
Start
bit8 Stop bit bit0
bit
bit8 Stop
bit
Load RSR
Read
Bit8 = 1, Address Byte
Bit8 = 0, Data Byte
WORD 1
RCREG
RCIF
Note: This timing diagram shows an address byte followed by a data byte. The data byte is not read into the RCREG (receive buffer)
because ADEN was not updated and still = 0.
TABLE 9-7 REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Address Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Ch
PIR1
PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
18h
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
1Ah
RCREG USART Receive Register
0000 0000 0000 0000
8Ch
PIE1
PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
98h
TXSTA CSRC TX9 TXEN SYNC —
BRGH TRMT TX9D 0000 -010 0000 -010
99h
SPBRG Baud Rate Generator Register
0000 0000 0000 0000
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Reception.
Note 1: Bits PSPIE and PSPIF are reserved on the 28-pin devices, always maintain these bits clear.
DS30275B-page 106
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1999-2013 Microchip Technology Inc.

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