PIC16C774T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16C774T-I/SO

28/40-Pin, 8-Bit CMOS Microcontrollers w/ 12-Bit A/D

Microchip Technology 

PIC16C77X

11.10 A/D Operation During Sleep

The A/D module can operate during SLEEP mode. This

requires that the A/D clock source be configured for RC

(ADCS1:ADCS0 = 11b). With the RC clock source

selected, when the GO/DONE bit is set the A/D module

waits one instruction cycle before starting the conver-

sion cycle. This allows the SLEEP instruction to be exe-

cuted, which eliminates all digital switching noise

during the sample and conversion. When the conver-

sion cycle is completed the GO/DONE bit is cleared,

and the result loaded into the ADRESH and ADRESL

registers. If the A/D interrupt is enabled, the device will

wake-up from SLEEP. If the A/D interrupt is not

enabled, the A/D module will then be turned off,

although the ADON bit will remain set.

When the A/D clock source is another clock option (not

RC), a SLEEP instruction causes the present conver-

sion to be aborted and the A/D module is turned off,

though the ADON bit will remain set.

TABLE 11-3 SUMMARY OF A/D REGISTERS

Turning off the A/D places the A/D module in its lowest

current consumption state.

Note:

For the A/D module to operate in SLEEP,

the A/D clock source must be configured to

RC (ADCS1:ADCS0 = 11b).

11.11 Connection Considerations

Since the analog inputs employ ESD protection, they

have diodes to VDD and VSS. This requires that the

analog input must be between VDD and VSS. If the input

voltage exceeds this range by greater than 0.3V (either

direction), one of the diodes becomes forward biased

and it may damage the device if the input current spec-

ification is exceeded.

An external RC filter is sometimes added for anti-alias-

ing of the input signal. The R component should be

selected to ensure that the total source impedance is

kept under the 2.5 k recommended specification. Any

external components connected (via hi-impedance) to

an analog input pin (capacitor, zener diode, etc.) should

have very little leakage current at the pin.

Address Name

Bit 7 Bit 6 Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on:

POR,

BOR

Value on all

other Resets

0Bh,8Bh,

10Bh,18Bh

0Ch

8Ch

INTCON

PIR1

PIE1

GIE

PSPIF(1)

PSPIE(1)

PEIE

ADIF

ADIE

T0IE

RCIF

RCIE

INTE

TXIF

TXIE

RBIE

SSPIF

SSPIE

T0IF

CCP1IF

CCP1IE

INTF

RBIF 0000 000x 0000 000u

TMR2IF TMR1IF 0000 0000 0000 0000

TMR2IE TMR1IE 0000 0000 0000 0000

1Eh

ADRESH A/D High Byte Result Register

xxxx xxxx uuuu uuuu

9Eh

ADRESL A/D Low Byte Result Register

xxxx xxxx uuuu uuuu

9Bh

REFCON VRHEN VRLEN VRHOEN VRLOEN

—

—

—

— 0000 ---- 0000 ----

1Fh

ADCON0 ADCS1 ADCS0 CHS2

CHS1

CHS0 GO/DONE CHS3

ADON 0000 0000 0000 0000

9Fh

ADCON1 ADFM VCFG2 VCFG1

VCFG0 PCFG3 PCFG2

PCFG1 PCFG0 0000 0000 0000 0000

05h

PORTA

—

— PORTA5(2) PORTA Data Latch when written: PORTA<4:0> pins when read --0x 0000 --0u 0000

06h

09h(2)

85h

PORTB

PORTE

TRISA

PORTB Data Latch when written: PORTB pins when read

—

—

—

—

—

RE2

—

— bit5(2)

PORTA Data Direction Register

xxxx 11xx uuuu 11uu

RE1

RE0 ---- -000 ---- -000

--11 1111 --11 1111

86h

TRISB PORTB Data Direction Register

1111 1111

89h(2)

TRISE

IBF

OBF

IBOV

PSPMODE

— PORTE Data Direction Bits

0000 -111

Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used for A/D conversion.

Note 1: Bits PSPIE and PSPIF are reserved on the 28-pin devices, always maintain these bits clear.

2: These bits/registers are not implemented on the 28-pin devices, read as '0'.

1111 1111

0000 -111

DS30275B-page 126

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