PIC16LC773I/SO View Datasheet(PDF) - Microchip Technology
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Description
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PIC16LC773I/SO Datasheet PDF : 202 Pages
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PIC16C77X
TABLE 12-6 INITIALIZATION CONDITIONS FOR ALL REGISTERS (Cont.’d)
Register
Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
Wake-up via WDT or
Interrupt
TRISA
773 774
773 774
---1 1111
--11 1111
---1 1111
--11 1111
---u uuuu
--uu uuuu
TRISB
773 774
1111 1111
1111 1111
uuuu uuuu
TRISC
773 774
1111 1111
1111 1111
uuuu uuuu
TRISD
773 774
1111 1111
1111 1111
uuuu uuuu
TRISE
773 774
0000 -111
0000 -111
uuuu -uuu
PIE1
773 774
r000 0000
r000 0000
ruuu uuuu
773 774
0000 0000
0000 0000
uuuu uuuu
PIE2
773 774
0--- 0--0
0--- 0--0
u--- u--u
PCON
773 774
---- --qq
---- --uu
---- --uu
PR2
773 774
1111 1111
1111 1111
1111 1111
SSPADD
773 774
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
773 774
0000 0000
0000 0000
uuuu uuuu
TXSTA
773 774
0000 -010
0000 -010
uuuu -uuu
SPBRG
773 774
0000 0000
0000 0000
uuuu uuuu
REFCON
773 774
0000 ----
0000 ----
uuuu ----
LVDCON
773 774
--00 0101
--00 0101
--uu uuuu
ADRESL
773 774
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON1
773 774
0000 000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as '0', q = value depends
on condition
Note 1: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the
interrupt vector (0004h).
3: See Table 12-5 for reset value for specific condition.
FIGURE 12-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO VDD)
VDD
MCLR
INTERNAL POR
PWRT TIME-OUT
OST TIME-OUT
INTERNAL RESET
TPWRT
TOST
1999-2013 Microchip Technology Inc.
Advance Information
DS30275B-page 135
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