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PIC12F1822T-I/SL View Datasheet(PDF) - Microchip Technology

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PIC12F1822T-I/SL Datasheet PDF : 398 Pages
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PIC12F/LF1822/16F/LF1823
19.0 TIMER0 MODULE
The Timer0 module is an 8-bit timer/counter with the
following features:
• 8-bit timer/counter register (TMR0)
• 8-bit prescaler (independent of Watchdog Timer)
• Programmable internal or external clock source
• Programmable external clock edge selection
• Interrupt on overflow
• TMR0 can be used to gate Timer1
Figure 19-1 is a block diagram of the Timer0 module.
19.1 Timer0 Operation
The Timer0 module can be used as either an 8-bit timer
or an 8-bit counter.
19.1.1 8-BIT TIMER MODE
The Timer0 module will increment every instruction
cycle, if used without a prescaler. 8-Bit Timer mode is
selected by clearing the TMR0CS bit of the OPTION
register.
When TMR0 is written, the increment is inhibited for
two instruction cycles immediately following the write.
Note:
The value written to the TMR0 register can
be adjusted, in order to account for the two
instruction cycle delay when TMR0 is
written.
19.1.2 8-BIT COUNTER MODE
In 8-bit Counter mode, the Timer0 module will increment
on every rising or falling edge of the T0CKI pin or the
Capacitive Sensing Oscillator (CPSCLK) signal.
8-Bit Counter mode using the T0CKI pin is selected by
setting the TMR0CS bit in the OPTION register to ‘1
and resetting the T0XCS bit in the CPSCON0 register to
0’.
8-Bit Counter mode using the Capacitive Sensing
Oscillator (CPSCLK) signal is selected by setting the
TMR0CS bit in the OPTION register to ‘1’ and setting
the T0XCS bit in the CPSCON0 register to ‘1’.
The rising or falling transition of the incrementing edge
for either input source is determined by the TMR0SE bit
in the OPTION register.
FIGURE 19-1:
BLOCK DIAGRAM OF THE TIMER0
FOSC/4
0
T0CKI
0
1
From CPSCLK
1 TMR0SE TMR0CS
T0XCS
8-bit
Prescaler
1
0
PSA
Sync
2 TCY
Data Bus
8
TMR0
Set Flag bit TMR0IF
on Overflow
Overflow to Timer1
8
PS<2:0>
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 169

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