PIC12F/LF1822/16F/LF1823
TABLE 21-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON
P1M<1:0>
DC1B<1:0>
CCP1M<3:0>
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
PIE1
TMR1GIE ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
PIR1
TMR1GIF ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
PR2
Timer2 Module Period Register
T2CON
—
TOUTPS<3:0>
TMR2ON T2CKPS1 T2CKPS0
TMR2
Holding Register for the 8-bit TMR2 Register
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Timer2 module.
* Page provides register information.
221
89
90
92
184*
186
184*
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 187