PIC16F1823-ESS View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F1823-ESS Datasheet PDF : 398 Pages
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PIC12F/LF1822/16F/LF1823
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on all
other
resets
Bank 0
000h(1) INDF0
001h(1) INDF1
002h(1)
003h(1)
004h(1)
005h(1)
006h(1)
007h(1)
008h(1)
009h(1)
00Ah(1)
00Bh(1)
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
—
—
—
TO
PD
Z
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
—
—
—
BSR<4:0>
Working Register
—
Write Buffer for the upper 7 bits of the Program Counter
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
DC
INTF
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
C
IOCIF
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
00Ch PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0 --xx xxxx --xx xxxx
00Dh
00Eh
—
PORTC(2)
Unimplemented
—
—
RC5
RC4
RC3
RC2
RC1
RC0
—
—
--xx xxxx --xx xxxx
00Fh —
Unimplemented
—
—
010h —
Unimplemented
—
—
011h
012h
PIR1
PIR2
TMR1GIF
OSFIF
ADIF
C2IF(2)
RCIF
C1IF
TXIF
EEIF
SSP1IF
BCL1IF
CCP1IF
—
TMR2IF
—
TMR1IF 0000 0000 0000 0000
—
0000 0--- 0000 0---
013h —
Unimplemented
—
—
014h —
Unimplemented
—
—
015h TMR0
Timer0 Module Register
xxxx xxxx uuuu uuuu
016h TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
017h TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
018h T1CON
TMR1CS1 TMR1CS0
T1CKPS<1:0>
T1OSCEN T1SYNC
—
TMR1ON 0000 00-0 uuuu uu-u
019h T1GCON
TMR1GE T1GPOL
T1GTM
T1GSPM
T1GGO/
DONE
T1GVAL
T1GSS<1:0>
0000 0x00 uuuu uxuu
01Ah TMR2
Timer2 Module Register
0000 0000 0000 0000
01Bh PR2
Timer2 Period Register
1111 1111 1111 1111
01Ch T2CON
—
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
-000 0000 -000 0000
01Dh —
Unimplemented
—
—
01Eh CPSCON0
CPSON
CPSRM
—
01Fh CPSCON1
—
—
—
—
CPSRNG<1:0>
CPSOUT T0XCS 00-- 0000 00-- 0000
—
CPSCH<3:2>(2)
CPSCH<1:0>
---- 0000 ---- 0000
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
PIC16F/LF1823 only.
2010 Microchip Technology Inc.
Preliminary
DS41413A-page 31
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