PIC12F1822T-I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC12F1822T-I/SL

8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC12F/LF1822/16F/LF1823

28.2 Instruction Descriptions

ADDFSR

Syntax:

Operands:

Operation:

Status Affected:

Description:

Add Literal to FSRn

[ label ] ADDFSR FSRn, k

-32  k  31

n  [ 0, 1]

FSR(n) + k  FSR(n)

None

The signed 6-bit literal ‘k’ is added to

the contents of the FSRnH:FSRnL

register pair.

FSRn is limited to the range

0000h-FFFFh. Moving beyond these

bounds will cause the FSR to

wrap-around.

ADDLW

Syntax:

Operands:

Operation:

Status Affected:

Description:

Add literal and W

[ label ] ADDLW k

0  k  255

(W) + k  (W)

C, DC, Z

The contents of the W register are

added to the eight-bit literal ‘k’ and the

result is placed in the W register.

ADDWF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Add W and f

[ label ] ADDWF f,d

0  f  127

d 0,1

(W) + (f)  (destination)

C, DC, Z

Add the contents of the W register

with register ‘f’. If ‘d’ is ‘0’, the result is

stored in the W register. If ‘d’ is ‘1’, the

result is stored back in register ‘f’.

ADDWFC

Syntax:

Operands:

Operation:

Status Affected:

Description:

ADD W and CARRY bit to f

[ label ] ADDWFC f {,d}

0  f  127

d [0,1]

(W) + (f) + (C)  dest

C, DC, Z

Add W, the Carry flag and data mem-

ory location ‘f’. If ‘d’ is ‘0’, the result is

placed in W. If ‘d’ is ‘1’, the result is

placed in data memory location ‘f’.

ANDLW

Syntax:

Operands:

Operation:

Status Affected:

Description:

AND literal with W

[ label ] ANDLW k

0  k  255

(W) .AND. (k)  (W)

Z

The contents of W register are

AND’ed with the eight-bit literal ‘k’.

The result is placed in the W register.

ANDWF

Syntax:

Operands:

Operation:

Status Affected:

Description:

AND W with f

[ label ] ANDWF f,d

0  f  127

d 0,1

(W) .AND. (f)  (destination)

Z

AND the W register with register ‘f’. If

‘d’ is ‘0’, the result is stored in the W

register. If ‘d’ is ‘1’, the result is stored

back in register ‘f’.

ASRF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Arithmetic Right Shift

[ label ] ASRF f {,d}

0  f  127

d [0,1]

(f<7>) dest<7>

(f<7:1>)  dest<6:0>,

(f<0>)  C,

C, Z

The contents of register ‘f’ are shifted

one bit to the right through the Carry

flag. The MSb remains unchanged. If

‘d’ is ‘0’, the result is placed in W. If ‘d’

is ‘1’, the result is stored back in reg-

ister ‘f’.

register f

C

 2010 Microchip Technology Inc.

Preliminary

DS41413A-page 323

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