PIC16F1823-I/SS View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1823-I/SS

8/14-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC12F/LF1822/16F/LF1823

29.1 DC Characteristics: PIC12F/LF1822/16F/LF1823-I/E (Industrial, Extended)

PIC12LF1822/16LF1823

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C  TA  +85°C for industrial

-40°C  TA  +125°C for extended

PIC12F1822/16F1823

Standard Operating Conditions (unless otherwise stated)

Operating temperature

-40°C  TA  +85°C for industrial

-40°C  TA  +125°C for extended

Param.

No.

Sym.

Characteristic

Min. Typ† Max. Units

Conditions

D001 VDD

Supply Voltage

PIC12LF1822/16LF1823 1.8

—

3.6

V FOSC  16 MHz:

2.3

—

3.6

V FOSC  32 MHz (NOTE 2)

D001

D002* VDR

PIC12F1822/16F1823 1.8

—

5.5

V FOSC  16 MHz:

2.3

—

5.5

V FOSC  32 MHz (NOTE 2)

RAM Data Retention Voltage(1)

PIC12LF1822/16LF1823 1.5 —

—

V Device in Sleep mode

D002*

PIC12F1822/16F1823 1.7 —

—

V Device in Sleep mode

VPOR*

Power-on Reset Release Voltage

— 1.6 —

V

VPORR* Power-on Reset Rearm Voltage

PIC12LF1822/16LF1823 — 0.8 —

V Device in Sleep mode

PIC12F1822/16F1823 — 1.7 —

V Device in Sleep mode

D003 VADFVR

Fixed Voltage Reference Voltage for -5.5

ADC, Initial Accuracy

-6.0

-5.5

-6.0

-5.5

-6.0

VCDAFVR Fixed Voltage Reference Voltage for -5.5

Comparator and DAC, Initial Accu- -6.0

racy

-5.5

-6.0

-5.5

-6.0

D004* SVDD

VDD Rise Rate to ensure internal

Power-on Reset signal

0.05 —

5.5

% 1.024V, VDD  2.5V, 85°C

6

1.024V, VDD  2.5V, 125°C

5.5

2.048V, VDD  2.5V, 85°C

6

2.048V, VDD  2.5V, 125°C

5.5

4.096V, VDD  4.75V, 85°C

6

4.096V, VDD  4.75V, 125°C

5.5

% 1.024V, VDD  2.5V, 85°C

6

1.024V, VDD  2.5V, 125°C

5.5

2.048V, VDD  2.5V, 85°C

6

2.048V, VDD  2.5V, 125°C

5.5

4.096V, VDD  4.75V, 85°C

6

4.096V, VDD  4.75V, 125°C

— V/ms See Section 7.1 “Power-on Reset

(POR)” for details.

* These parameters are characterized but not tested.

† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not

tested.

Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.

2: PLL required for 32 MHz operation.

DS41413A-page 336

Preliminary

 2010 Microchip Technology Inc.

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