PIC16(L)F1824/1828
TABLE 12-1: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ANSELA
—
—
—
ANSA4
—
ANSA2
ANSA1
ANSA0
APFCON0(1)
APFCON1
INLVLA
RXDTSEL
—
—
SDOSEL
—
—
SSSEL
—
INLVLA5
—
—
INLVLA4
T1GSEL
P1DSEL
INLVLA3
TXCKSEL
P1CSEL
INLVLA2
—
P2BSEL
INLVLA1
—
CCP2SEL
INLVLA0
LATA
—
—
LATA5
LATA4
—
LATA2
LATA1
LATA0
OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE
PSA
PS<2:0>
PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0
TRISA
—
—
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
WPUA
—
—
WPUA5
WPUA4
WPUA3
WPUA2
WPUA1 WPUA0
Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA.
Note 1: Unshaded cells apply to PIC16F/LF1824 only.
Register
on Page
127
123
123
128
127
187
126
126
128
TABLE 12-2: SUMMARY OF CONFIGURATION WORD WITH PORTA
Name Bits Bit -/7
Bit -/6
Bit 13/5
Bit 12/4
Bit 11/3 Bit 10/2
Bit 9/1
Bit 8/0
CONFIG1
Legend:
13:8
—
—
FCMEN
IESO CLKOUTEN
BOREN<1:0>
7:0
CP
MCLRE
PWRTE
WDTE<1:0>
FOSC<2:0>
— = unimplemented location, read as ‘0’. Shaded cells are not used by PORTA.
CPD
Register
on Page
52
2010 Microchip Technology Inc.
Preliminary
DS41419B-page 129