PIC16(L)F1824/1828
REGISTER 13-6: IOCBF: INTERRUPT-ON-CHANGE PORTB FLAG REGISTER
(PIC16F/LF1828 ONLY)
R/W-0/0
R/W-0/0
R/W-0/0
R/W-0/0
U-0
U-0
U-0
IOCBF7
IOCBF6
IOCBF5
IOCBF4
—
—
—
bit 7
U-0
—
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
bit 7-4
bit 3-0
IOCBF<7:4>: Interrupt-on-Change PORTB Flag bits
1 = An enabled change was detected on the associated pin.
Set when IOCBPx = 1 and a rising edge was detected on RAx, or when IOCANx = 1 and a falling edge
was detected on RBx.
0 = No change was detected, or the user cleared the detected change.
Unimplemented: Read as ‘0’
TABLE 13-1: SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPT-ON-CHANGE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELA
—
—
—
ANSA4
—
ANSA2 ANSA1 ANSA0
127
ANSELB(1)
ANSB7 ANSB6 ANSB5 ANSB4
—
—
—
—
133
INLVLA
—
—
INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128
INLVLB(1)
INLVLB7 INLVLB6 INLVLB5 INLVLB4
—
—
—
—
133
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
93
IOCAF
—
—
IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0
142
IOCAN
—
—
IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 142
IOCAP
—
—
IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0
142
IOCBF(1)
IOCBF7 IOCBF6 IOCBF5 IOCBF4
—
—
—
—
144
IOCBN(1)
IOCBN7 IOCBN6 IOCBN5 IOCBN4
—
—
—
—
143
IOCBP(1)
IOCBP7 IOCBP6 IOCBP5 IOCBP4
—
—
—
—
143
TRISA
—
—
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
126
TRISB(1)
TRISB7 TRISB6 TRISB5 TRISB4
—
—
—
—
132
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Interrupt-on-Change.
Note 1: PIC16F/LF1828 only.
DS41419B-page 144
Preliminary
2010 Microchip Technology Inc.