PIC16(L)F1824/1828
TABLE 24-10: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
APFCON1
CCPxCON
—
—
PxM<1:0>(1)
—
—
DCxB<1:0>
P1DSEL
P1CSEL P2BSEL
CCPxM<3:0>
CCP2SEL
CCPxAS
CCPxASE
CCPxAS<2:0>
PSSxAC<1:0>
PSSxBD<1:0>
CCPTMRS0
C4TSEL<1:0>
C3TSEL<1:0>
C2TSEL<1:0>
C1TSEL<1:0>
INLVLA
INLVLC
INTCON
—
—
INLVLC7(1) INLVLC6(1)
GIE
PEIE
INLVLA5
INLVLC5
TMR0IE
INLVLA4
INLVLC4
INTE
INLVLA3
INLVLC3
IOCIE
INLVLA2
INLVLC2
TMR0IF
INLVLA1
INLVLC1
INTF
INLVLA0
INLVLC0
IOCIF
PIE1
PIE2
TMR1GIE
OSFIE
ADIE
C2IE
RCIE
C1IE
TXIE
EEIE
SSP1IE
BCLIE
CCP1IE
—
TMR2IE
—
TMR1IE
CCP2IE
PIE3
—
—
CCP4IE CCP3IE TMR6IE
—
TMR4IE
—
PIR1
PIR2
TMR1GIF
OSFIF
ADIF
C2IF
RCIF
C1IF
TXIF
EEIF
SSP1IF
BCLIF
CCP1IF
—
TMR2IF
—
TMR1IF
CCP2IF
PIR3
—
—
CCP4IF CCP3IF TMR6IF
—
TMR4IF
—
PRx
Timer2/4/6 Period Register
PSTRxCON
—
—
—
STRxSYNC STRxD
STRxC
STRxB
STRxA
PWMxCON PxRSEN
PxDC<6:0>
TxCON
—
TxOUTPS<3:0>
TMRxON
TxCKPS<:0>1
TRISA
TRISC
—
—
TRISC7(2) TRISC6(2)
TRISA5
TRISC5
TRISA4
TRISC4
TRISA3
TRISC3
TRISA2
TRISC2
TRISA1
TRISC1
TRISA0
TRISC0
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.
Note 1: Applies to ECCP modules only.
2: PIC16F/LF1828 only.
Register
on Page
123
238
240
239
128
139
93
94
95
96
97
98
99
201*
242
241
203
126
137
2010 Microchip Technology Inc.
Preliminary
DS41419B-page 237