PIC16F1828T-I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1828T-I/SL

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16F/LF1824/1828

REGISTER 27-2: CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1

U-0

—

bit 7

U-0

U-0

U-0

R/W-0/0(1)

R/W-0/0

R/W-0/0

R/W-0/0

—

—

—

CPSCH<3:2>

CPSCH<1:0>

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7-4

bit 3-0

Unimplemented: Read as ‘0’

CPSCH<3:0>: Capacitive Sensing Channel Select bits

If CPSON = 0:

These bits are ignored. No channel is selected.

If CPSON = 1:

0000 = channel 0, (CPS0)

0001 = channel 1, (CPS1)

0010 = channel 2, (CPS2)

0011 = channel 3, (CPS3)

0100 = channel 4, (CPS4)

0101 = channel 5, (CPS5)

0110 = channel 6, (CPS6)

0111 = channel 7, (CPS7)

1000 = channel 8, (CPS4)(1)

1001 = channel 9, (CPS5)(1)

1010 = channel 10, (CPS6)(1)

1011 = channel 11, (CPS7)(1)

1100 = Reserved. Do not use.

•

•

•

1111 = Reserved. Do not use.

Note 1: These channels are only implemented on the PIC16F/LF1828.

TABLE 27-3: SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

ANSELA

—

—

—

ANSA4

—

ANSA2 ANSA1 ANSA0

ANSELC

ANSC7 ANSC6

—

—

ANSC3 ANSC2 ANSC1 ANSC0

CPSCON0

CPSON CPSRM

—

—

CPSRNG1 CPSRNG0 CPSOUT T0XCS

CPSCON1

—

—

—

—

CPSCH3 CPSCH2 CPSCH1 CPSCH0

INLVLA

INLVLB(1)

—

INLVLB7

—

INLVLB6

INLVLA5

INLVLB5

INLVLA4

INLVLB4

INLVLA3

—

INLVLA2

—

INLVLA1

—

INLVLA0

—

INLVLC

INTCON

INLVLC7(1) INLVLC6(1) INLVLC5

GIE

PEIE

TMR0IE

INLVLC4

INTE

INLVLC3

IOCIE

INLVLC2

TMR0IF

INLVLC1

INTF

INLVLC0

IOCIF

OPTION_REG WPUEN INTEDG TMR0CS TMR0SE

PSA

PS2

T1CON

TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC

PS1

PS0

—

TMR1ON

TRISA

—

—

TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0

TRISB(1)

TRISC

TRISB7 TRISB6

TRISC7(1) TRISC6(1)

TRISB5

TRISC5

TRISB4

TRISC4

—

TRISC3

—

TRISC2

—

TRISC1

—

TRISC0

Legend: — = Unimplemented locations, read as ‘0’. Shaded cells are not used by the capacitive sensing module.

Note 1: PIC16F/LF1828 only.

Register

on Page

127

138

331

332

128

133

139

93

187

197

126

132

137

DS41419B-page 332

Preliminary

 2010 Microchip Technology Inc.

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