PIC16(L)F1824/1828
Formulas ........................................................... 310
High Baud Rate Select (BRGH Bit) .................. 309
Synchronous Master Mode ............................... 318, 322
Associated Registers
Receive..................................................... 321
Transmit.................................................... 319
Reception.......................................................... 320
Transmission .................................................... 318
Synchronous Slave Mode
Associated Registers
Receive..................................................... 323
Transmit.................................................... 322
Reception.......................................................... 323
Transmission .................................................... 322
Extended Instruction Set
ADDFSR ................................................................... 341
F
Fail-Safe Clock Monitor....................................................... 69
Fail-Safe Condition Clearing ....................................... 69
Fail-Safe Detection ..................................................... 69
Fail-Safe Operation..................................................... 69
Reset or Wake-up from Sleep..................................... 69
Firmware Instructions........................................................ 337
Fixed Voltage Reference (FVR) ........................................ 145
Associated Registers ................................................ 146
Flash Program Memory .................................................... 107
Erasing...................................................................... 112
Modifying................................................................... 116
Writing....................................................................... 112
FSR Register .......... 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43
FVRCON (Fixed Voltage Reference Control) Register ..... 146
I
I2C Mode (MSSPx)
Acknowledge Sequence Timing................................ 283
Bus Collision
During a Repeated Start Condition ................... 288
During a Stop Condition.................................... 289
Effects of a Reset...................................................... 284
I2C Clock Rate w/BRG.............................................. 291
Master Mode
Operation .......................................................... 275
Reception.......................................................... 281
Start Condition Timing .............................. 277, 278
Transmission .................................................... 279
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 284
Multi-Master Mode .................................................... 284
Read/Write Bit Information (R/W Bit) ........................ 260
Slave Mode
Transmission .................................................... 265
Sleep Operation ........................................................ 284
Stop Condition Timing............................................... 283
INDF Register ......... 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43
Indirect Addressing ............................................................. 47
INLVLA Register ............................................................... 128
INLVLB Register ............................................................... 133
Instruction Format ............................................................. 338
Instruction Set ................................................................... 337
ADDLW ..................................................................... 341
ADDWF..................................................................... 341
ADDWFC .................................................................. 341
ANDLW ..................................................................... 341
ANDWF..................................................................... 341
BRA........................................................................... 342
CALL......................................................................... 343
CALLW ..................................................................... 343
LSLF ......................................................................... 345
LSRF ........................................................................ 345
MOVF ....................................................................... 345
MOVIW ..................................................................... 346
MOVLB ..................................................................... 346
MOVWI ..................................................................... 347
OPTION.................................................................... 347
RESET...................................................................... 347
SUBWFB .................................................................. 349
TRIS ......................................................................... 350
BCF .......................................................................... 342
BSF........................................................................... 342
BTFSC...................................................................... 342
BTFSS ...................................................................... 342
CALL......................................................................... 343
CLRF ........................................................................ 343
CLRW ....................................................................... 343
CLRWDT .................................................................. 343
COMF ....................................................................... 343
DECF........................................................................ 343
DECFSZ ................................................................... 344
GOTO ....................................................................... 344
INCF ......................................................................... 344
INCFSZ..................................................................... 344
IORLW ...................................................................... 344
IORWF...................................................................... 344
MOVLW .................................................................... 346
MOVWF.................................................................... 346
NOP.......................................................................... 347
RETFIE..................................................................... 348
RETLW ..................................................................... 348
RETURN................................................................... 348
RLF........................................................................... 348
RRF .......................................................................... 349
SLEEP ...................................................................... 349
SUBLW..................................................................... 349
SUBWF..................................................................... 349
SWAPF..................................................................... 350
XORLW .................................................................... 350
XORWF .................................................................... 350
INTCON Register................................................................ 93
Internal Oscillator Block
INTOSC
Specifications ................................................... 367
Internal Sampling Switch (RSS) Impedance ..................... 159
Internet Address ............................................................... 415
Interrupt-On-Change......................................................... 141
Associated Registers................................................ 144
Interrupts ............................................................................ 87
ADC .......................................................................... 154
Associated registers w/ Interrupts ............................ 100
Configuration Word w/ Clock Sources........................ 73
Configuration Word w/ Reference Clock Sources ...... 77
TMR1........................................................................ 193
INTOSC Specifications ..................................................... 367
IOCAF Register ................................................................ 142
IOCAN Register ................................................................ 142
IOCAP Register ................................................................ 142
IOCBF Register ................................................................ 144
IOCBN Register ................................................................ 143
IOCBP Register ................................................................ 143
L
LATA Register .......................................................... 127, 137
2010 Microchip Technology Inc.
Preliminary
DS41419B-page 409