PIC16LF1934-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF1934-I/SP

28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP™ Technology

Microchip Technology 

TABLE 2-7: PIC16F1938/1939 MEMORY MAP, BANKS 8-15

BANK 8

BANK 9

BANK 10

BANK 11

400h

401h

402h

403h

404h

405h

406h

407h

408h

409h

40Ah

40Bh

40Ch

40Dh

40Eh

40Fh

410h

411h

412h

413h

414h

415h

416h

417h

418h

419h

41Ah

41Bh

41Ch

41Dh

41Eh

41Fh

420h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

TMR4

PR4

T4CON

—

—

—

—

TMR6

PR6

T6CON

—

480h

481h

482h

483h

484h

485h

486h

487h

488h

489h

48Ah

48Bh

48Ch

48Dh

48Eh

48Fh

490h

491h

492h

493h

494h

495h

496h

497h

498h

499h

49Ah

49Bh

49Ch

49Dh

49Eh

49Fh

4A0h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

500h

501h

502h

503h

504h

505h

506h

507h

508h

509h

50Ah

50Bh

50Ch

50Dh

50Eh

50Fh

510h

511h

512h

513h

514h

515h

516h

517h

518h

519h

51Ah

51Bh

51Ch

51Dh

51Eh

51Fh

520h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

580h

581h

582h

583h

584h

585h

586h

587h

588h

589h

58Ah

58Bh

58Ch

58Dh

58Eh

58Fh

590h

591h

592h

593h

594h

595h

596h

597h

598h

599h

59Ah

59Bh

59Ch

59Dh

59Eh

59Fh

5A0h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

General

Purpose

Register

80 Bytes

General

Purpose

Register

80 Bytes

General

Purpose

Register

80 Bytes

General

Purpose

Register

80 Bytes

46Fh

470h

47Fh

Accesses

70h – 7Fh

4EFh

4F0h

4FFh

Accesses

70h – 7Fh

56Fh

570h

57Fh

Accesses

70h – 7Fh

5EFh

5F0h

5FFh

Accesses

70h – 7Fh

Legend:

= Unimplemented data memory locations, read as ‘0’.

BANK 12

BANK 13

BANK 14

BANK 15

600h

INDF0

680h

601h

INDF1

681h

602h

PCL

682h

603h

STATUS

683h

604h

FSR0L

684h

605h

FSR0H

685h

606h

FSR1L

686h

607h

FSR1H

687h

608h

BSR

688h

609h

WREG

689h

60Ah

PCLATH

68Ah

60Bh

INTCON

68Bh

60Ch

—

68Ch

60Dh

—

68Dh

60Eh

—

68Eh

60Fh

—

68Fh

610h

—

690h

611h

—

691h

612h

—

692h

613h

—

693h

614h

—

694h

615h

—

695h

616h

—

696h

617h

—

697h

618h

—

698h

619h

—

699h

61Ah

—

69Ah

61Bh

—

69Bh

61Ch

—

69Ch

61Dh

—

69Dh

61Eh

—

69Eh

61Fh

—

69Fh

620h General Purpose 6A0h

Register

48 Bytes

66Fh

670h

Unimplemented

Read as ‘0’

Accesses

70h – 7Fh

6EFh

6F0h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Unimplemented

Read as ‘0’

Accesses

70h – 7Fh

700h

701h

702h

703h

704h

705h

706h

707h

708h

709h

70Ah

70Bh

70Ch

70Dh

70Eh

70Fh

710h

711h

712h

713h

714h

715h

716h

717h

718h

719h

71Ah

71Bh

71Ch

71Dh

71Eh

71Fh

720h

76Fh

770h

INDF0

INDF1

PCL

STATUS

FSR0L

FSR0H

FSR1L

FSR1H

BSR

WREG

PCLATH

INTCON

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Unimplemented

Read as ‘0’

Accesses

70h – 7Fh

780h

INDF0

781h

INDF1

782h

PCL

783h

STATUS

784h

FSR0L

785h

FSR0H

786h

FSR1L

787h

FSR1H

788h

BSR

789h

WREG

78Ah

PCLATH

78Bh

INTCON

78Ch

—

78Dh

—

78Eh

—

78Fh

—

790h

—

791h

792h

793h

794h

795h

796h

797h

798h

799h

79Ah

79Bh

See Table 2-10 or

Table 2-11

79Ch

79Dh

79Eh

79Fh

7A0h

7EFh

7F0h

Accesses

70h – 7Fh

67Fh

6FFh

77Fh

7FFh

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