PIC16LF1938-ESP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF1938-ESP

28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP™ Technology

Microchip Technology 

4.0 INTERRUPTS

The PIC16F193X/LF193X device family features an

interruptible core, allowing certain events to preempt

normal program flow. An Interrupt Service Routine

(ISR) is used to determine the source of the interrupt

and act accordingly. Some interrupts can be configured

to wake the MCU from Sleep mode.

The PIC16F193X/LF193X device family has 23 inter-

rupt sources, differentiated by corresponding interrupt

enable and flag bits:

• External Edge Detect on INT Pin Interrupt

• Interrupt-on-Change Interrupt

• A/D Conversion Complete Interrupt

• EEPROM Write Complete Interrupt

• EUSART Receive Interrupt

• EUSART Transmit Interrupt

• LCD Module Interrupt

• Oscillator Fail Interrupt

FIGURE 4-1:

INTERRUPT LOGIC

PIC16F193X/LF193X

• Timer0 Overflow Interrupt

• Timer1 Gate Interrupt

• Timer1 Overflow Interrupt

• Timer2 Match with PR2 Interrupt

• Timer4 Match with PR4 Interrupt

• Timer6 Match with PR6 Interrupt

• Comparator C1 Interrupt

• Comparator C2 Interrupt

• CCP1 Event Interrupt

• CCP2 Event Interrupt

• CCP3 Event Interrupt

• CCP4 Event Interrupt

• CCP5 Event Interrupt

• MSSP Event Interrupt

• MSSP Bus Collision Interrupt

A block diagram of the interrupt logic is shown in

Figure 4-1.

TMR0IF

TMR0IE

INTF

INTE

From Peripheral Interrupt

Logic (Figure 4-2)

IOCIF

IOCIE

PEIE

GIE

Wake-up (If in Sleep mode)

Interrupt to CPU

© 2009 Microchip Technology Inc.

Preliminary

DS41364B-page 69

Share Link: