PIC16F610/616/16HV610/616
FIGURE 15-12: PIC16F616/16HV616 A/D CONVERSION TIMING (NORMAL MODE)
BSF ADCON0, GO
AD134
Q4
A/D CLK
(TOSC/2(1))
AD131
AD130
1 TCY
A/D Data
9
8
7
6
3
2
1
0
ADRES
OLD_DATA
NEW_DATA
ADIF
1 TCY
GO
Sample AD132
Sampling Stopped
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
FIGURE 15-13: PIC16F616/16HV616 A/D CONVERSION TIMING (SLEEP MODE)
BSF ADCON0, GO
AD134
Q4
A/D CLK
A/D Data
ADRES
ADIF
GO
Sample AD132
(TOSC/2 + TCY(1))
AD131
AD130
1 TCY
9
8
76
3
2
1
0
OLD_DATA
Sampling Stopped
NEW_DATA
1 TCY
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
© 2009 Microchip Technology Inc.
DS41288F-page 167