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PIC16F688-I/ST View Datasheet(PDF) - Microchip Technology

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Description
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PIC16F688-I/ST Datasheet PDF : 202 Pages
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PIC16F688
FIGURE 7-2:
COMPARATOR C1 OUTPUT BLOCK DIAGRAM
C1INV
C1
To C1OUT pin
DQ
Q1
EN
RD CMCON0
DQ
Q3*RD CMCON0 EN
CL
Reset
Note 1: Q1 and Q3 are phases of the four-phase system clock (FOSC).
2: Q1 is held high during Sleep mode.
To Data Bus
Set C1IF bit
FIGURE 7-3:
COMPARATOR C2 OUTPUT BLOCK DIAGRAM
C2INV
C2
DQ
Timer1
clock source(1)
C2SYNC
0
1
To Timer1 Gate
To C2OUT pin
DQ
Q1
EN
DQ
Q3*RD CMCON0 EN
CL
Reset
To Data Bus
RD CMCON0
Set C2IF bit
Note 1: Comparator output is latched on falling edge of Timer1 clock source.
2: Q1 and Q3 are phases of the four-phase system clock (FOSC).
3: Q1 is held high during Sleep mode.
DS41203D-page 54
© 2007 Microchip Technology Inc.

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