PIC16F688-I/ST View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16F688-I/ST
Microchip Technology
PIC16F688-I/ST Datasheet PDF : 202 Pages
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PIC16F688
9.1.2
READING THE DATA EEPROM
MEMORY
To read a data memory location, the user must write the
address to the EEADR register, clear the EEPGD
control bit of the EECON1 register, and then set control
bit RD of the EECON1 register. The data is available in
the very next cycle, in the EEDAT register; therefore, it
can be read in the next instruction. EEDAT will hold this
value until another read or until it is written to by the
user (during a write operation).
EXAMPLE 9-1: DATA EEPROM READ
BANKSEL EEADR
MOVLW DATA_EE_ADDR
MOVWF EEADR
BCF
EECON1, EEPGD
BSF
MOVF
EECON1, RD
EEDAT, W
;
;
;Data Memory
;Address to read
;Point to DATA
;memory
;EE Read
;W = EEDAT
9.1.3
WRITING TO THE DATA EEPROM
MEMORY
To write an EEPROM data location, the user must first
write the address to the EEADR register and the data
to the EEDAT register. Then the user must follow a
specific sequence to initiate the write for each byte.
The write will not initiate if the above sequence is not
followed exactly (write 55h to EECON2, write AAh to
EECON2, then set WR bit) for each byte. Interrupts
should be disabled during this code segment.
Additionally, the WREN bit in EECON1 must be set to
enable write. This mechanism prevents accidental
writes to data EEPROM due to errant (unexpected)
code execution (i.e., lost programs). The user should
keep the WREN bit clear at all times, except when
updating EEPROM. The WREN bit is not cleared
by hardware.
After a write sequence has been initiated, clearing the
WREN bit will not affect this write cycle. The WR bit will
be inhibited from being set unless the WREN bit is set.
At the completion of the write cycle, the WR bit is
cleared in hardware and the EE Write Complete
Interrupt Flag bit (EEIF) is set. The user can either
enable this interrupt or poll this bit. EEIF must be
cleared by software.
EXAMPLE 9-2: DATA EEPROM WRITE
BANKSEL
MOVLW
MOVWF
MOVLW
MOVWF
BANKSEL
BCF
BSF
EEADR
DATA_EE_ADDR
EEADR
DATA_EE_DATA
EEDAT
EECON1
EECON1, EEPGD
EECON1, WREN
;
;
;Data Memory Address to write
;
;Data Memory Value to write
;
;Point to DATA memory
;Enable writes
BCF
BTFSC
GOTO
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BSF
INTCON, GIE
INTCON, GIE
$-2
55h
EECON2
AAh
EECON2
EECON1, WR
INTCON, GIE
;Disable INTs.
;SEE AN576
;
;Write 55h
;
;Write AAh
;Set WR bit to begin write
;Enable INTs.
SLEEP
BCF
EECON1, WREN
;Wait for interrupt to signal write complete
;Disable writes
DS41203D-page 80
© 2007 Microchip Technology Inc.
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