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PIC16F689T-I/SO View Datasheet(PDF) - Microchip Technology

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PIC16F689T-I/SO Datasheet PDF : 306 Pages
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PIC16F631/677/685/687/689/690
9.3 A/D Acquisition Requirements
For the ADC to meet its specified accuracy, the charge
holding capacitor (CHOLD) must be allowed to fully
charge to the input channel voltage level. The Analog
Input model is shown in Figure 9-4. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge the
capacitor CHOLD. The sampling switch (RSS) impedance
varies over the device voltage (VDD), see Figure 9-4.
The maximum recommended impedance for analog
sources is 10 kΩ. As the source impedance is
decreased, the acquisition time may be decreased.
After the analog input channel is selected (or changed),
an A/D acquisition must be done before the conversion
can be started. To calculate the minimum acquisition
time, Equation 9-1 may be used. This equation
assumes that 1/2 LSb error is used (1024 steps for the
ADC). The 1/2 LSb error is the maximum error allowed
for the ADC to meet its specified resolution.
EQUATION 9-1: ACQUISITION TIME EXAMPLE
Assumptions: Temperature = 50°C and external impedance of 10kΩ 5.0V VDD
TACQ = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient
= TAMP + TC + TCOFF
= 2μs + TC + [(Temperature - 25°C)(0.05μs/°C)]
The value for TC can be approximated with the following equations:
VAPPLI
ED
1
(---2---n----+--1--1--)--------1--⎠⎞
=
VCHOLD
VAPP
LIED
1
e-R---T--C-C--⎟⎞
=
VCHOLD
;[1] VCHOLD charged to within 1/2 lsb
;[2] VCHOLD charge response to VAPPLIED
VAPPLI
ED
1
e-R---T-C--c-⎟⎞
=
VA
PP
L
I
E
D
1
(---2---n----+--1--1--)--------1--⎠⎞
;combining [1] and [2]
Note: Where n = number of bits of the ADC.
Solving for TC:
TC = CHOLD(RIC + RSS + RS) ln(1/2047)
= 10pF(1kΩ + 7kΩ + 10kΩ) ln(0.0004885)
= 1.37μs
Therefore:
TACQ = 2μS + 1.37μS + [(50°C- 25°C)(0.05μS/°C)]
= 4.67μS
DS41262E-page 116
© 2008 Microchip Technology Inc.

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