PIC16F716
FIGURE 3-4:
BLOCK DIAGRAM OF RB1/T1OSO/T1CKI PIN
T1OSCEN RBPU(1)
VDD
P
weak
pull-up
DATA BUS
WR PORTB
WR TRISB
Data Latch
DQ
CK Q
TRIS Latch
DQ
CK Q
VDD
VSS
RB1/T1OSO/T1CKI
RD TRISB
T1OSCEN
Q
D
TTL Buffer
EN
RD PORTB
T1OSI (From RB2)
To Timer1 clock input
TMR1 oscillator
ST Buffer
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
FIGURE 3-5:
BLOCK DIAGRAM OF RB2/T1OSI PIN
T1OSCEN RBPU(1)
DATA BUS
WR PORTB
Data Latch
DQ
CK Q
WR TRISB
TRIS Latch
DQ
CK Q
VDD
P
weak
pull-up
VDD
VSS
RB2/T1OSI
RD TRIS
T1OSCEN
TTL Buffer
QD
EN
RD PORTB
T1OSO (To RB1)
TMR1
Oscillator
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
DS41206A-page 22
Preliminary
2003 Microchip Technology Inc.