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PIC16F716-I/P View Datasheet(PDF) - Microchip Technology

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PIC16F716-I/P Datasheet PDF : 126 Pages
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PIC16F716
7.3 PWM Mode
In Pulse Width Modulation (PWM) mode, the CCP1 pin
produces up to a 10-bit resolution PWM output. Since
the CCP1 pin is multiplexed with the PORTB data latch,
the TRISB<3> bit must be cleared to make the CCP1
pin an output.
Note:
Clearing the CCP1CON register will force
the CCP1 PWM output latch to the default
low level. This is not the PORTB I/O data
latch.
Figure 7-3 shows a simplified block diagram of the
CCP module in PWM mode.
For a step-by-step procedure on how to setup the
ECCP module for PWM operation, see Section 7.3.3
“Set-Up for PWM Operation”.
FIGURE 7-3:
SIMPLIFIED PWM BLOCK
DIAGRAM
Duty cycle registers
CCPR1L
CCP1CON<5:4>
CCPR1H (Slave)
Comparator
RB3/CCP1/P1A
R
Q
TMR2
(Note 1)
S
Comparator
PR2
Clear Timer,
CCP1 pin and
latch D.C.
TRISB<3>
Note 1: 8-bit timer is concatenated with 2-bit internal Q clock
or 2 bits of the prescaler to create 10-bit time base.
A PWM output (Figure 7-4) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 7-4:
PWM OUTPUT
Period = PR2+1
Duty Cycle
TMR2 = PR2
TMR2 = Duty Cycle (CCPR1H)
TMR2 = PR2
7.3.1 PWM PERIOD
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 7-1:
PWM Period = [(PR2) + 1] • 4 • Tosc •
(TMR2 prescale value)
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set (exception: if PWM duty
cycle = 0%, the CCP1 pin will not be set)
• The PWM duty cycle is latched from CCPR1L into
CCPR1H
Note:
The Timer2 postscaler (see Section 6.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
DS41206A-page 36
Preliminary
2003 Microchip Technology Inc.

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