PIC16F72-04I/ML View Datasheet(PDF) - Microchip Technology
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PIC16F72-04I/ML Datasheet PDF : 136 Pages
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12.1 Instruction Descriptions
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
Add Literal and W
[ label ] ADDLW k
0 ≤ k ≤ 255
(W) + k → (W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal ‘k’
and the result is placed in the W
register.
PIC16F72
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND W with f
[ label ] ANDWF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(W) .AND. (f) → (destination)
Z
AND the W register with register
‘f’. If ‘d’ = ‘0’, the result is stored in
the W register. If ‘d’ = ‘1’, the
result is stored back in register ‘f’.
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Add W and f
[ label ] ADDWF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(W) + (f) → (destination)
C, DC, Z
Add the contents of the W register
with register ‘f’. If ‘d’ = ‘0’, the
result is stored in the W register. If
‘d’ = ‘1’, the result is stored back
in register ‘f’.
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Clear f
[ label ] BCF f,b
0 ≤ f ≤ 127
0≤b≤7
0 → (f<b>)
None
Bit ‘b’ in register ‘f’ is cleared.
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
AND Literal with W
[ label ] ANDLW k
0 ≤ k ≤ 255
(W) .AND. (k) → (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Bit Set f
[ label ] BSF f,b
0 ≤ f ≤ 127
0≤b≤7
1 → (f<b>)
None
Bit ‘b’ in register ‘f’ is set.
© 2007 Microchip Technology Inc.
DS39597C-page 75
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