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PIC16F72-04I/ML View Datasheet(PDF) - Microchip Technology

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Description
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PIC16F72-04I/ML Datasheet PDF : 136 Pages
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PIC16F72
FIGURE 14-6:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP
TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
OSC
Time-out
Internal
RESET
Watchdog
Timer
Reset
33
32
I/O Pins
Note: Refer to Figure 14-3 for load conditions.
30
31
34
34
FIGURE 14-7:
BROWN-OUT RESET TIMING
VDD
VBOR
35
TABLE 14-3: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER,
AND BROWN-OUT RESET REQUIREMENTS
Parameter No. Symbol
Characteristic
Min
Typ†
Max Units
Conditions
30
TmcL MCLR Pulse Width (low)
2
μs VDD = 5V, -40°C to +85°C
31*
TWDT Watchdog Timer Time-out Period
7
(No Prescaler)
18
33
ms VDD = 5V, -40°C to +85°C
32
TOST Oscillation Start-up Timer Period
— 1024 TOSC
— TOSC = OSC1 period
33*
TPWRT Power-up Timer Period
28
72
132 ms VDD = 5V, -40°C to +85°C
34
TIOZ
I/O Hi-impedance from MCLR Low —
2.1
μs
or Watchdog Timer Reset
35
TBOR Brown-out Reset Pulse Width
100
μs VDD VBOR (D005)
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
DS39597C-page 96
© 2007 Microchip Technology Inc.

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