PIC16F721-IP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F721-IP

20-Pin Flash Microcontrollers

Microchip Technology 

PIC16(L)F720/721

2.2 Data Memory Organization

The data memory is partitioned into multiple banks

which contain the General Purpose Registers (GPRs)

and the Special Function Registers (SFRs). Bits RP0

and RP1 are bank select bits.

RP1 RP0

0

0  Bank 0 is selected

0

1  Bank 1 is selected

1

0  Bank 2 is selected

1

1  Bank 3 is selected

Each bank extends up to 7Fh (128 bytes). The lower

locations of each bank are reserved for the Special

Function Registers. Above the Special Function

Registers are the General Purpose Registers,

implemented as static RAM. All implemented banks

contain Special Function Registers. Some frequently

used Special Function Registers from one bank are

mirrored in another bank for code reduction and

quicker access.

DS41430D-page 12

 2010-2013 Microchip Technology Inc.

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