PIC16F720-EML View Datasheet(PDF) - Microchip Technology
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PIC16F720-EML Datasheet PDF : 254 Pages
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PIC16(L)F720/721
Since data is being written to buffer registers, the
writing of the first 31 words of the block appears to
occur immediately. The processor will halt internal
operations for the typical 2ms, only during the cycle in
which the erase takes place (i.e., the last word of the
32-word block erase). This is not Sleep mode as the
clocks and peripherals will continue to run. After the 32-
word write cycle, the processor will resume operation
with the third instruction after the PMCON1 write
instruction.
FIGURE 18-2:
BLOCK OF 32 WRITES TO FLASH PROGRAM MEMORY
75
07
0
PMDATH
PMDATL
6
8
14
14
14
14
PMADRL<4:0> = 00000
PMADRL<4:0> = 00001
PMADRL<4:0> = 00010
PMADRL<4:0> = 11111
Buffer Register
Buffer Register
Buffer Register
Buffer Register
Program Memory
An example of the complete 32-word write sequence is
shown in Example 18-2. The initial address is loaded
into the PMADRH:PMADRL register pair; the 32 words
of data are loaded using indirect addressing.
DS41430D-page 162
2010-2013 Microchip Technology Inc.
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