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PIC16F726-I/SP View Datasheet(PDF) - Microchip Technology

Part Name
Description
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PIC16F726-I/SP Datasheet PDF : 302 Pages
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PIC16F72X/PIC16LF72X
12.0 TIMER1 MODULE WITH GATE
CONTROL
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit timer/counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 3-bit prescaler
• Dedicated LP oscillator circuit
• Synchronous or asynchronous operation
• Multiple Timer1 gate (count enable) sources
• Interrupt on overflow
• Wake-up on overflow (external clock,
Asynchronous mode only)
• Time base for the Capture/Compare function
• Special Event Trigger (with CCP)
FIGURE 12-1:
TIMER1 BLOCK DIAGRAM
• Selectable Gate Source Polarity
• Gate Toggle Mode
• Gate Single-pulse Mode
• Gate Value Status
• Gate Event Interrupt
Figure 12-1 is a block diagram of the Timer1 module.
T1GSS<1:0>
T1G
00
T1GSPM
From Timer0
01
Overflow
From Timer2
Match PR2
10
From WDT
Overflow
11
T1GPOL
Set flag bit
TMR1IF on
Overflow
T1OSO/T1CKI
T1OSI
T1OSCEN
T1CKI
T1G_IN
TMR1ON
T1GTM
DQ
CK Q
R
0
Single Pulse
1
Acq. Control
T1GGO/DONE
0
T1GVAL
DQ
1
Q1 EN
Interrupt
det
TMR1ON
TMR1GE
Data Bus
RD
T1GCON
Set
TMR1GIF
TMR1(2)
TMR1H
TMR1L
EN
QD
OUT
T1OSC
EN
(1)
TMR1CS<1:0>
Cap. Sensing
Oscillator
1
0
FOSC
Internal
Clock
FOSC/4
Internal
Clock
T1CLK
0
Synchronized
clock input
1
T1SYNC
11
Prescaler
1, 2, 4, 8
10
2
T1CKPS<1:0>
01
Synchronize(3)
det
FOSC/2
Internal
Sleep input
00
Clock
Note 1: ST Buffer is high speed type when using T1CKI.
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
© 2009 Microchip Technology Inc.
DS41341E-page 115

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