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PIC16F727T-I/SP View Datasheet(PDF) - Microchip Technology

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PIC16F727T-I/SP Datasheet PDF : 302 Pages
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PIC16F72X/PIC16LF72X
3.4.2 WDT CONTROL
The WDTE bit is located in the Configuration Word
Register 1. When set, the WDT runs continuously.
The PSA and PS<2:0> bits of the OPTION register
control the WDT period. See Section 11.0 “Timer0
Module” for more information.
FIGURE 3-1: WATCHDOG TIMER BLOCK DIAGRAM
T1GSS = 11
TMR1GE
WDTE
From TMR0
Clock Source
Low-Power
WDT OSC
0
Divide by
512
1
PSA
TABLE 3-1: WDT STATUS
Conditions
WDTE = 0
CLRWDT Command
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Postscaler
8
0
1
To T1G
WDTE
PS<2:0>
TO TMR0
WDT Reset
WDT
Cleared
Cleared until the end of OST
DS41341E-page 36
© 2009 Microchip Technology Inc.

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