PIC16LF777T-I/SP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16LF777T-I/SP

28/40/44-Pin, 8-Bit CMOS Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC16F7X7

RLF

Rotate Left f through Carry

Syntax:

Operands:

Operation:

Status Affected:

Description:

[ label ] RLF f,d

0 ≤ f ≤ 127

d ∈ [0,1]

See description below

C

The contents of register ‘f’ are

rotated one bit to the left through the

Carry flag. If ‘d’ is ‘0’, the result is

placed in the W register. If ‘d’ is ‘1’,

the result is stored back in register ‘f’.

C

Register f

RETURN

Syntax:

Operands:

Operation:

Status Affected:

Description:

Return from Subroutine

[ label ] RETURN

None

TOS → PC

None

Return from subroutine. The stack

is POPed and the top of the stack

(TOS) is loaded into the program

counter. This is a two-cycle

instruction.

RRF

Syntax:

Operands:

Operation:

Status Affected:

Description:

Rotate Right f through Carry

[ label ] RRF f,d

0 ≤ f ≤ 127

d ∈ [0,1]

See description below

C

The contents of register ‘f’ are

rotated one bit to the right through

the Carry flag. If ‘d’ is ‘0’, the

result is placed in the W register.

If ‘d’ is ‘1’, the result is placed

back in register ‘f’.

C

Register f

SLEEP

Syntax:

Operands:

Operation:

Status Affected:

Description:

Enter Sleep mode

[ label ] SLEEP

None

00h → WDT,

0 → WDT prescaler,

1 → TO,

0 → PD

TO, PD

The Power-Down status bit, PD,

is cleared. Time-out status bit,

TO, is set. Watchdog Timer and

its prescaler are cleared.

The processor is put into Sleep

mode with the oscillator stopped.

SUBLW

Subtract W from Literal

Syntax:

[ label ] SUBLW k

Operands:

0 ≤ k ≤ 255

Operation:

k – (W) → (W)

Status Affected: C, DC, Z

Description:

The W register is subtracted (2’s

complement method) from the

eight-bit literal ‘k’. The result is

placed in the W register.

SUBWF

Subtract W from f

Syntax:

[ label ] SUBWF f,d

Operands:

0 ≤ f ≤ 127

d ∈ [0,1]

Operation:

(f) – (W) → (destination)

Status Affected: C, DC, Z

Description:

Subtract (2’s complement method)

W register from register ‘f’. If ‘d’ is

‘0’, the result is stored in the W

register. If ‘d’ is ‘1’, the result is

stored back in register ‘f’.

 2004 Microchip Technology Inc.

DS30498C-page 199

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