PIC16C712/716
FIGURE 3-5: BLOCK DIAGRAM OF RB2/T1OSI PIN
DATA BUS
WR PORTB
RBPU(1)
T1OSCEN
PORTB<2>
DQ
CK Q
VDD
P
weak
pull-up
VDD
RB1/T1OSO/T1CKI
TRISB<2>
VSS
DQ
WR TRISB
CK Q
T1OSCEN
RD PORTB
TTL Buffer
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>).
FIGURE 3-6: BLOCK DIAGRAM OF RB3/CCP1 PIN
RBPU(1)
CCPON
DATA BUS
RD
DATACCP
WR
DATACCP
WR
TRISCCP
CCP
Output
Mode
WR
PORTB
WR
TRISB
CCPON
1
0
CCPON
DATACCP<2>
DQ
CK Q
TRISCCP<2>
DQ
CK Q
PORTB<3>
DQ
CK Q
TRISB<3>
DQ
CK Q
1
0
1
0
1
0
CCPIN
VDD
P
weak
pull-up
VDD
RB3/CCP1
VSS
RD PORTB
1
0
TTL Buffer
Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s)
and clear the RBPU bit (OPTION_REG<7>).
© 1999 Microchip Technology Inc.
Preliminary
DS41106A-page 25