PIC16C71T-04SS View Datasheet(PDF) - Microchip Technology
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Description
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PIC16C71T-04SS Datasheet PDF : 176 Pages
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PIC16C71X
FIGURE 13-3: CLKOUT AND I/O TIMING
OSC1
Q4
Q1
10
Applicable Devices 710 71 711 715
Q2
Q3
11
CLKOUT
I/O Pin
(input)
13
14
17
19 18
15
12
16
I/O Pin
(output)
old value
new value
20, 21
Note: Refer to Figure 13-1 for load conditions.
TABLE 13-3: CLKOUT AND I/O TIMING REQUIREMENTS
Parameter Sym
No.
Characteristic
Min
Typ†
Max
Units Conditions
10* TosH2ckL OSC1↑ to CLKOUT↓
—
15
30
ns
Note 1
11* TosH2ckH OSC1↑ to CLKOUT↑
—
15
30
ns
Note 1
12* TckR
CLKOUT rise time
—
5
15
ns
Note 1
13* TckF
CLKOUT fall time
—
5
15
ns
Note 1
14* TckL2ioV CLKOUT ↓ to Port out valid
—
— 0.5TCY + 20 ns
Note 1
15* TioV2ckH Port in valid before CLKOUT ↑
0.25TCY + 25 —
—
ns
Note 1
16* TckH2ioI Port in hold after CLKOUT ↑
0
—
—
ns
Note 1
17* TosH2ioV OSC1↑ (Q1 cycle) to
Port out valid
—
— 80 - 100 ns
18* TosH2ioI OSC1↑ (Q2 cycle) to
Port input invalid (I/O in hold time)
TBD
—
—
ns
19* TioV2osH Port input valid to OSC1↑ (I/O in setup time)
TBD
—
—
ns
20* TioR
Port output rise time
PIC16C715
—
10
25
ns
PIC16LC715
—
—
60
ns
21* TioF
Port output fall time
PIC16C715
—
10
25
ns
PIC16LC715
—
—
60
ns
22††* Tinp
INT pin high or low time
20
—
—
ns
23††* Trbp
RB7:RB4 change INT high or low time
20
—
—
ns
* These parameters are characterized but not tested.
† Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
†† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.
© 1997 Microchip Technology Inc.
DS30272A-page 119
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