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PIC16C710T-04 View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16C710T-04
Microchip
Microchip Technology 
PIC16C710T-04 Datasheet PDF : 176 Pages
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PIC16C71X
Example 4-1 shows the calling of a subroutine in
page 1 of the program memory. This example assumes
that PCLATH is saved and restored by the interrupt ser-
vice routine (if interrupts are used).
EXAMPLE 4-1:
ORG 0x500
BSF PCLATH,3
BCF PCLATH,4
CALL SUB1_P1
:
:
:
ORG 0x900
SUB1_P1:
:
:
RETURN
CALL OF A SUBROUTINE IN
PAGE 1 FROM PAGE 0
;Select page 1 (800h-FFFh)
;Only on >4K devices
;Call subroutine in
;page 1 (800h-FFFh)
;called subroutine
;page 1 (800h-FFFh)
;return to Call subroutine
;in page 0 (000h-7FFh)
FIGURE 4-15: DIRECT/INDIRECT ADDRESSING
4.5 Indirect Addressing, INDF and FSR
Registers
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister, FSR. Reading the INDF register itself indirectly
(FSR = '0') will read 00h. Writing to the INDF register
indirectly results in a no-operation (although status bits
may be affected). An effective 9-bit address is obtained
by concatenating the 8-bit FSR register and the IRP bit
(STATUS<7>), as shown in Figure 4-15. However, IRP
is not used in the PIC16C71X devices.
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 4-2.
EXAMPLE 4-2: INDIRECT ADDRESSING
movlw
movwf
NEXT
clrf
incf
btfss
goto
CONTINUE
:
0x20
FSR
INDF
FSR,F
FSR,4
NEXT
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
RP1:RP0
Direct Addressing
6
from opcode
0
Indirect Addressing
IRP(1) 7
FSR register
0
bank select location select
00
00h
01
80h
10
100h
11
180h
bank select
location select
Data
Memory
Not
Used
7Fh
FFh
17Fh
1FFh
Bank 0 Bank 1 Bank 2 Bank 3
For register file map detail see Figure 4-4.
Note 1: The RP1 and IRP bits are reserved, always maintain these bits clear.
DS30272A-page 24
© 1997 Microchip Technology Inc.

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