PIC16C711-04I/SP View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC16C711-04I/SP Datasheet PDF : 176 Pages
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PIC16C71X
SUBWF
Subtract W from f
Syntax:
[ label ] SUBWF f,d
Operands:
0 ≤ f ≤ 127
d ∈ [0,1]
Operation:
(f) - (W) → (dest)
Status Affected: C, DC, Z
Encoding:
00 0010 dfff ffff
Description:
Subtract (2’s complement method) W reg-
ister from register 'f'. If 'd' is 0 the result is
stored in the W register. If 'd' is 1 the
result is stored back in register 'f'.
Words:
1
Cycles:
1
Q Cycle Activity: Q1
Q2
Q3
Q4
Decode Read Process Write to
register 'f' data
dest
Example 1:
Example 2:
Example 3:
SUBWF REG1,1
Before Instruction
REG1
W
C
Z
=3
=2
=?
=?
After Instruction
REG1
W
C
Z
=1
=2
= 1; result is positive
=0
Before Instruction
REG1
W
C
Z
=2
=2
=?
=?
After Instruction
REG1
W
C
Z
=0
=2
= 1; result is zero
=1
Before Instruction
REG1
W
C
Z
=1
=2
=?
=?
After Instruction
REG1
W
C
Z
= 0xFF
=2
= 0; result is negative
=0
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Swap Nibbles in f
[ label ] SWAPF f,d
0 ≤ f ≤ 127
d ∈ [0,1]
(f<3:0>) → (dest<7:4>),
(f<7:4>) → (dest<3:0>)
None
00 1110 dfff ffff
The upper and lower nibbles of regis-
ter 'f' are exchanged. If 'd' is 0 the
result is placed in W register. If 'd' is 1
the result is placed in register 'f'.
1
1
Q1
Q2
Q3
Q4
Decode Read Process Write to
register 'f' data
dest
Example
SWAPF REG, 0
Before Instruction
REG1 =
After Instruction
REG1 =
W
=
0xA5
0xA5
0x5A
TRIS
Load TRIS Register
Syntax:
[label] TRIS f
Operands:
5≤f≤7
Operation:
(W) → TRIS register f;
Status Affected: None
Encoding:
00 0000 0110 0fff
Description:
The instruction is supported for code
compatibility with the PIC16C5X prod-
ucts. Since TRIS registers are read-
able and writable, the user can directly
address them.
Words:
1
Cycles:
1
Example
To maintain upward compatibility
with future PIC16CXX products, do
not use this instruction.
© 1997 Microchip Technology Inc.
DS30272A-page 83
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