PIC16F1512T-E/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1512T-E/SO

28-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

PIC16(L)F1512/3

20.6.8 ACKNOWLEDGE SEQUENCE

TIMING

An Acknowledge sequence is enabled by setting the

Acknowledge Sequence Enable bit, ACKEN bit of the

SSPCON2 register. When this bit is set, the SCL pin is

pulled low and the contents of the Acknowledge data bit

are presented on the SDA pin. If the user wishes to

generate an Acknowledge, then the ACKDT bit should

be cleared. If not, the user should set the ACKDT bit

before starting an Acknowledge sequence. The Baud

Rate Generator then counts for one rollover period

(TBRG) and the SCL pin is deasserted (pulled high).

When the SCL pin is sampled high (clock arbitration),

the Baud Rate Generator counts for TBRG. The SCL pin

is then pulled low. Following this, the ACKEN bit is

automatically cleared, the Baud Rate Generator is

turned off and the MSSP module then goes into Idle

mode (Figure 20-29).

20.6.8.1 WCOL Status Flag

If the user writes the SSPBUF when an Acknowledge

sequence is in progress, then WCOL is set and the

contents of the buffer are unchanged (the write does

not occur).

20.6.9 STOP CONDITION TIMING

A Stop bit is asserted on the SDA pin at the end of a

receive/transmit by setting the Stop Sequence Enable

bit, PEN bit of the SSPCON2 register. At the end of a

receive/transmit, the SCL line is held low after the

falling edge of the ninth clock. When the PEN bit is set,

the master will assert the SDA line low. When the SDA

line is sampled low, the Baud Rate Generator is

reloaded and counts down to ‘0’. When the Baud Rate

Generator times out, the SCL pin will be brought high

and one TBRG (Baud Rate Generator rollover count)

later, the SDA pin will be deasserted. When the SDA

pin is sampled high while SCL is high, the P bit of the

SSPSTAT register is set. A TBRG later, the PEN bit is

cleared and the SSPIF bit is set (Figure 20-30).

20.6.9.1 WCOL Status Flag

If the user writes the SSPBUF when a Stop sequence

is in progress, then the WCOL bit is set and the

contents of the buffer are unchanged (the write does

not occur).

FIGURE 20-30: ACKNOWLEDGE SEQUENCE WAVEFORM

Acknowledge sequence starts here,

write to SSPCON2

ACKEN = 1, ACKDT = 0

SDA

D0

TBRG

TBRG

ACK

ACKEN automatically cleared

SCL

8

9

SSPIF

SSPIF set at

the end of receive

Cleared in

software

Note: TBRG = one Baud Rate Generator period.

Cleared in

software

SSPIF set at the end

of Acknowledge sequence

DS40001624C-page 214

 2012-2014 Microchip Technology Inc.

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