PIC16(L)F1512/3
3.2.7
SPECIAL FUNCTION REGISTERS
SUMMARY
The Special Function Registers are listed in Table 3-9.
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 0
00Ch PORTA
00Dh PORTB
00Eh PORTC
00Fh —
PORTA Data Latch when written: PORTA pins when read
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
Unimplemented
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
—
010h PORTE
011h PIR1
012h PIR2
013h —
—
—
TMR1GIF ADIF
OSFIF
—
Unimplemented
—
RCIF
—
—
TXIF
—
RE3
SSPIF
BCLIF
—
CCP1IF
—
—
TMR2IF
—
—
TMR1IF
CCP2IF
---- x--- ---- u---
0000 0000 0000 0000
0--- 0--0 0--- 0--0
—
—
014h —
Unimplemented
—
—
015h TMR0
016h TMR1L
017h TMR1H
018h T1CON
019h T1GCON
Timer0 Module Register
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
TMR1CS<1:0>
T1CKPS<1:0>
T1OSCEN T1SYNC
TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ T1GVAL
DONE
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
TMR1ON 0000 00-0 uuuu uu-u
T1GSS<1:0>
0000 0x00 uuuu uxuu
01Ah TMR2
01Bh PR2
01Ch T2CON
01Dh —
Timer 2 Module Register
Timer 2 Period Register
—
Unimplemented
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
0000 0000 0000 0000
1111 1111 1111 1111
-000 0000 -000 0000
—
—
01Eh —
Unimplemented
—
—
01Fh —
Unimplemented
—
—
Bank 1
08Ch TRISA
08Dh TRISB
08Eh TRISC
08Fh —
090h TRISE
091h PIE1
092h PIE2
093h —
PORTA Data Direction Register
PORTB Data Direction Register
PORTC Data Direction Register
Unimplemented
—
—
—
TMR1GIE ADIE
RCIE
OSFIE
—
—
Unimplemented
—
TXIE
—
—(2)
SSPIE
BCLIE
—
CCP1IE
—
—
TMR2IE
—
1111 1111 1111 1111
1111 1111 1111 1111
1111 1111 1111 1111
—
—
—
TMR1IE
CCP2IE
---- 1--- ---- 1---
0000 0000 0000 0000
0--- 0--0 0--- 0--0
—
—
094h —
Unimplemented
—
—
095h OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE
PSA
PS<2:0>
1111 1111 1111 1111
096h PCON
097h WDTCON
STKOVF STKUNF
—
—
—
RWDT RMCLR
RI
WDTPS<4:0>
POR
BOR 00-1 11qq qq-q qquu
SWDTEN --01 0110 --01 0110
098h —
Unimplemented
—
—
099h OSCCON
—
IRCF<3:0>
—
SCS<1:0>
-011 1-00 -011 1-00
09Ah OSCSTAT
SOSCR
—
OSTS HFIOFR
—
09Bh ADRES0L(3)
A/D Result Register Low
09Ch ADRES0H(3)
A/D Result Register High
09Dh ADCON0(3)
—
CHS<4:0>
09Eh ADCON1(3)
ADFM
ADCS<2:0>
—
09Fh —
Unimplemented
—
LFIOFR HFIOFS 0-q0 --00 q-qq --0q
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
GO/DONE ADON -000 0000 -000 0000
—
ADPREF<1:0> 0000 --00 0000 --00
—
—
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
PIC16F1512/3 only.
Unimplemented, read as ‘1’.
This register is available in Bank 1 and Bank 14 under similar register names. See Table 16-4.
DS40001624C-page 24
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