PIC16(L)F1512/3
TABLE 25-5: MEMORY PROGRAMMING REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Param
No.
Sym.
Characteristic
Program Memory
Programming Specifications
D110 VIHH Voltage on MCLR/VPP/RA5 pin
D111 IDDP Supply Current during
Programming
D112 VBE VDD for Bulk Erase
D113 VPEW VDD for Write or Row Erase
Min.
Typ† Max. Units
Conditions
8.0
—
9.0
V (Note 2, Note 3)
—
—
10
mA
2.7
—
VDD
V
max.
VDD
min.
—
VDD
V
max.
D114 IPPPGM Current on MCLR/VPP during Erase/
—
Write
—
1.0
mA
D115 IDDPGM Current on VDD during Erase/Write
—
5.0
mA
Program Flash Memory
D121 EP
Cell Endurance
10K
—
— E/W -40C to +85C (Note 1)
D122 VPRW VDD for Read/Write
VDD
—
VDD
V
min.
max.
D123 TIW Self-timed Write Cycle Time
—
2
2.5 ms
D124 TRETD Characteristic Retention
—
40
— Year Provided no other
specifications are violated
D125 EHEFC High-Endurance Flash Cell
100K
—
— E/W 0C TA +60°C, lower
byte last 128 addresses
†
Note 1:
2:
3:
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Self-write and Block Erase.
Required only if single-supply programming is disabled.
The MPLAB® ICD 2 does not support variable VPP output. Circuitry to limit the MPLAB ICD 2 VPP voltage
must be placed between the MPLAB ICD 2 and target system when programming or debugging with the
MPLAB ICD 2.
2012-2014 Microchip Technology Inc.
DS40001624C-page 293