PIC16F1526-IPT View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC16F1526-IPT

64-Pin Flash Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC16(L)F1526/27

7.6.2 PIE1 REGISTER

The PIE1 register contains the interrupt enable bits, as

shown in Register 7-2.

Note: Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

REGISTER 7-2: PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1

R/W-0/0

TMR1GIE

bit 7

R/W-0/0

ADIE

R/W-0/0

RC1IE

R/W-0/0

TX1IE

R/W-0/0

SSP1IE

R/W-0/0

CCP1IE

R/W-0/0

TMR2IE

R/W-0/0

TMR1IE

bit 0

Legend:

R = Readable bit

u = Bit is unchanged

‘1’ = Bit is set

W = Writable bit

x = Bit is unknown

‘0’ = Bit is cleared

U = Unimplemented bit, read as ‘0’

-n/n = Value at POR and BOR/Value at all other Resets

bit 7

TMR1GIE: Timer1 Gate Interrupt Enable bit

1 = Enables the Timer1 Gate Acquisition interrupt

0 = Disables the Timer1 Gate Acquisition interrupt

bit 6

ADIE: A/D Converter (ADC) Interrupt Enable bit

1 = Enables the ADC interrupt

0 = Disables the ADC interrupt

bit 5

RC1IE: USART1 Receive Interrupt Enable bit

1 = Enables the USART1 receive interrupt

0 = Disables the USART1 receive interrupt

bit 4

TX1IE: USART1 Transmit Interrupt Enable bit

1 = Enables the USART1 transmit interrupt

0 = Disables the USART1 transmit interrupt

bit 3

SSP1IE: Synchronous Serial Port (MSSP1) Interrupt Enable bit

1 = Enables the MSSP1 interrupt

0 = Disables the MSSP1 interrupt

bit 2

CCP1IE: CCP1 Interrupt Enable bit

1 = Enables the CCP1 interrupt

0 = Disables the CCP1 interrupt

bit 1

TMR2IE: TMR2 to PR2 Match Interrupt Enable bit

1 = Enables the Timer2 to PR2 match interrupt

0 = Disables the Timer2 to PR2 match interrupt

bit 0

TMR1IE: Timer1 Overflow Interrupt Enable bit

1 = Enables the Timer1 overflow interrupt

0 = Disables the Timer1 overflow interrupt

 2011 Microchip Technology Inc.

Preliminary

DS41458B-page 81

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