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PIC16LF1906T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC16LF1906T-I/SO Datasheet PDF : 288 Pages
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PIC16LF1904/6/7
FIGURE 18-2:
EUSART RECEIVE BLOCK DIAGRAM
CREN
OERR
RCIDL
RX/DT pin
Baud Rate Generator
BRG16
+1
SPBRGH SPBRGL
Pin Buffer
and Control
FOSC
Data
Recovery
÷n
Multiplier x4 x16 x64 n
SYNC 1 X 0 0 0
BRGH X 1 1 0 0
BRG16 X 1 0 1 0
The operation of the EUSART module is controlled
through three registers:
• Transmit Status and Control (TXSTA)
• Receive Status and Control (RCSTA)
• Baud Rate Control (BAUDCON)
These registers are detailed in Register 18-1,
Register 18-2 and Register 18-3, respectively.
For all modes of EUSART operation, the TRIS control
bits corresponding to the RX/DT and TX/CK pins should
be set to ‘1’. The EUSART control will automatically
reconfigure the pin from input to output, as needed.
When the receiver or transmitter section is not enabled
then the corresponding RX/DT or TX/CK pin may be
used for general purpose input and output.
MSb
Stop (8)
RSR Register
7 ••• 1
LSb
0 START
RX9
FERR
RX9D
RCREG Register
FIFO
8
Data Bus
RCIF
RCIE
Interrupt
DS41569A-page 156
Preliminary
2011 Microchip Technology Inc.

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