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PIC17C43T-08/P View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC17C43T-08/P
Microchip
Microchip Technology 
PIC17C43T-08/P Datasheet PDF : 240 Pages
First Prev 181 182 183 184 185 186 187 188 189 190 Next Last
PIC17C4X
Applicable Devices 42 R42 42A 43 R43 44
FIGURE 19-9: USART MODULE: SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
RA5/TX/CK
pin
RA4/RX/DT
pin
121
120
121
122
TABLE 19-9: SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
No. Sym
Characteristic
Min Typ† Max Units Conditions
120 TckH2dtV SYNC XMIT (MASTER &
SLAVE)
Clock high to data out valid
PIC17CR42/42A/43/R43/44
PIC17LCR42/42A/43/R43/44
— — 50 ns
— — 75 ns
121 TckRF
Clock out rise time and fall time PIC17CR42/42A/43/R43/44
(Master Mode)
PIC17LCR42/42A/43/R43/44
— — 25 ns
— — 40 ns
122 TdtRF Data out rise time and fall time PIC17CR42/42A/43/R43/44
— — 25 ns
PIC17LCR42/42A/43/R43/44
— — 40 ns
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
FIGURE 19-10: USART MODULE: SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RA5/TX/CK
pin
RA4/RX/DT
pin
125
126
TABLE 19-10: SYNCHRONOUS RECEIVE REQUIREMENTS
Parameter
No.
Sym
Characteristic
Min
Typ† Max Units Conditions
125
TdtV2ckL SYNC RCV (MASTER & SLAVE)
Data hold before CK(DT hold time)
15
ns
126
TckL2dtl Data hold after CK(DT hold time)
15
ns
Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
© 1996 Microchip Technology Inc.
DS30412C-page 189

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