PIC17C42AT View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC17C42AT

High-Performance 8-Bit CMOS EPROM/ROM Microcontroller

Microchip Technology 

PIC17C4X

FIGURE 11-5: TMR0 READ/WRITE IN TIMER MODE

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

AD15:AD0

ALE

WR_TRM0L

WR_TMR0H

RD_TMR0L

TMR0H

12

12

13

AB

TMR0L

FE

FF

56

57

58

Instruction

fetched

Instruction

executed

MOVFP

MOVFP

MOVPF

MOVPF

MOVPF

MOVPF

DATAL,TMR0L DATAH,TMR0H TMR0L,W

TMR0L,W

TMR0L,W

TMR0L,W

Write TMR0L Write TMR0H Read TMR0L Read TMR0L Read TMR0L Read TMR0L

Previously

Fetched

Instruction

MOVFP

MOVFP

MOVPF

MOVPF

MOVPF

DATAL,TMR0L DATAH,TMR0H TMR0L,W

TMR0L,W

TMR0L,W

Write TMR0L Write TMR0H Read TMR0L Read TMR0L Read TMR0L

In this example, old TMR0 value is 12FEh, new value of AB56h is written.

TABLE 11-1: REGISTERS/BITS ASSOCIATED WITH TIMER0

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2 Bit 1 Bit 0

Value on

Power-on

Reset

Value on all

other resets

(Note1)

05h, Unbanked T0STA

INTEDG T0SE

T0CS

PS3

PS2

PS1

PS0 —

0000 000- 0000 000-

06h, Unbanked CPUSTA

—

—

STKAV GLINTD TO

PD

—

— --11 11-- --11 qq--

07h, Unbanked INTSTA

PEIF T0CKIF T0IF

INTF PEIE T0CKIE T0IE INTE 0000 0000 0000 0000

0Bh, Unbanked TMR0L TMR0 register; low byte

xxxx xxxx uuuu uuuu

0Ch, Unbanked TMR0H TMR0 register; high byte

xxxx xxxx uuuu uuuu

Legend: x = unknown, u = unchanged, - = unimplemented read as a '0', q - value depends on condition, Shaded cells are not used by Timer0.

Note 1: Other (non power-up) resets include: external reset through MCLR and the Watchdog Timer Reset.

DS30412C-page 70

© 1996 Microchip Technology Inc.

Share Link: