PIC18CXX8
17.1.2 TRANSMIT/RECEIVE BUFFERS
The PIC18CXX8 has three transmit and two receive
buffers, two acceptance masks (one for each receive
buffer), and a total of six acceptance filters. Figure 17-1
is a block diagram of these buffers and their connection
to the protocol engine.
FIGURE 17-1: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM
BUFFERS
TXB0
TXB1
TXB2
Acceptance Mask
RXM0
A
c
Acceptance Filter
c
RXF0
e
p
Acceptance Filter
t
RXF1
Acceptance Mask
RXM1
Acceptance Filter
RXF2
Acceptance Filter
A
RXF3
c
c
Acceptance Filter
e
RXF4
p
t
Acceptance Filter
RXF5
Message
Queue
Control
Transmit Byte Sequencer
R
R
X
Identifier
M
Identifier
X
B
A
B
0
B
1
Data Field
Data Field
PROTOCOL
ENGINE
Transmit Shift
CRC Generator
Receive Shift
CRC Check
Receive
Error
Counter
Transmit
Error
Counter
RXERRCNT
TXERRCNT
ErrPas
BusOff
Protocol
Finite
State
Machine
Transmit
Logic
TX
Bit
Timing
Logic
RX
Bit Timing
Generator
DS30475A-page 184
Advanced Information
2000 Microchip Technology Inc.