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PIC18LC658-I/CL View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC18LC658-I/CL
Microchip
Microchip Technology 
PIC18LC658-I/CL Datasheet PDF : 366 Pages
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PIC18CXX8
5.2 Program Memory Read/Writes
5.2.1 TABLE READ OVERVIEW (TBLRD)
The TBLRD instructions are used to read data from pro-
gram memory to data memory.
TBLPTR points to a byte address in program space.
Executing TBLRD places the byte pointed to into
TABLAT. In addition, TBLPTR can be modified auto-
matically for the next Table Read operation.
Table Reads from program memory are performed one
byte at a time. The instruction will load TABLAT with the
one byte from program memory pointed to by TBLPTR.
5.2.2 PROGRAM MEMORY WRITE BLOCK SIZE
The program memory of PIC18CXX8 devices is written
in blocks. For PIC18CXX8 devices, the write block size
is 2 bytes. Consequently, Table Write operations to
program memory are performed in pairs, one byte at a
time.
When a Table Write occurs to an even program mem-
ory address (TBLPTR<0> = 0), the contents of TABLAT
are transferred to an internal holding register. This is
performed as a short write and the program memory
block is not actually programmed at this time. The
holding register is not accessible by the user.
When a Table Write occurs to an odd program memory
address (TBLPTR<0> = 1), a long write is started. Dur-
ing the long write, the contents of TABLAT are written
to the high byte of the program memory block and the
contents of the holding register are transferred to the
low byte of the program memory block.
Figure 5-3 shows the holding register and the program
memory write blocks.
If a single byte is to be programmed, the low (even)
byte of the destination program word should be read
using TBLRD*, modified or changed, if required, and
written back to the same address using TBLWT*+. The
high (odd) byte should be read using TBLRD*, modified
or changed if required, and written back to the same
address using TBLWT. The write to an odd address will
cause a long write to begin. This process ensures that
existing data in either byte will not be changed unless
desired.
FIGURE 5-3: HOLDING REGISTER AND THE WRITE
Program Memory
n-1
n
n+1
n+2
DataLow
DataHigh
Holding Register
MSB
LSB
DataLow
MSB
DataHigh
LSB
DataLow
Instruction Execution
; TABLPTR points to address n
MOVLW DataLow ; Load low data
MOVWF TABLAT ; byte to TABLAT
TBLWT*+
; Write it to LSB
; of Holding register
MOVLW DataHigh ; Load high data
MOVWF TABLAT ; byte to TABLAT
TBLWT*
; Write it to MSB
; of Holding
; register and
; begin long
; write
EXAMPLE 5-1: TABLE READ CODE EXAMPLE
; Read a byte from location 0x0020
CLRF TBLPTRU
; Load upper 5 bits of
; 0x0020
CLRF TBLPTRH
; Load higher 8 bits of
; 0x0020
MOVLW 0x20
; Load 0x20 into
MOVWF TBLPTRL
; TBLPTRL
MOVWF TBLRD*
; Data is in TABLAT
DS30475A-page 68
Advanced Information
2000 Microchip Technology Inc.

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