PIC18LF4331T-I/SO View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF4331T-I/SO

28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

Microchip Technology 

PIC18F2331/2431/4331/4431

REGISTER 20-1: TXSTA: TRANSMIT STATUS AND CONTROL REGISTER

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

CSRC

TX9

TXEN(1)

SYNC

SENDB

BRGH

bit 7

R-1

TRMT

R/W-0

TX9D

bit 0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

CSRC: Clock Source Select bit

Asynchronous mode:

Don’t care.

Synchronous mode:

1 = Master mode (clock generated internally from BRG)

0 = Slave mode (clock from external source)

bit 6

TX9: 9-Bit Transmit Enable bit

1 = Selects 9-bit transmission

0 = Selects 8-bit transmission

bit 5

TXEN: Transmit Enable bit(1)

1 = Transmit enabled

0 = Transmit disabled

bit 4

SYNC: EUSART Mode Select bit

1 = Synchronous mode

0 = Asynchronous mode

bit 3

SENDB: Send Break Character bit

Asynchronous mode:

1 = Send Sync Break on next transmission (cleared by hardware upon completion)

0 = Sync Break transmission completed

Synchronous mode:

Don’t care.

bit 2

BRGH: High Baud Rate Select bit

Asynchronous mode:

1 = High speed

0 = Low speed

Synchronous mode:

Unused in this mode.

bit 1

TRMT: Transmit Shift Register Status bit

1 = TSR is empty

0 = TSR is full

bit 0

TX9D: 9th Bit of Transmit Data

Can be address/data bit or a parity bit.

Note 1: SREN/CREN overrides TXEN in Sync mode.

DS39616D-page 218

 2010 Microchip Technology Inc.

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