PIC18LF2431-I/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF2431-I/ML

28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

Microchip Technology 

PIC18F2331/2431/4331/4431

22.5 Operation During Sleep

When enabled, the LVD circuitry continues to operate

during Sleep. If the device voltage crosses the trip

point, the LVDIF bit will be set and the device will wake-

up from Sleep. Device execution will continue from the

interrupt vector address if interrupts have been globally

enabled.

22.6 Effects of a Reset

A device Reset forces all registers to their Reset state.

This forces the LVD module to be turned off.

22.7 Applications

Figure 22-3 shows a possible application voltage curve

(typically for batteries). Over time, the device voltage

decreases. When the device voltage equals voltage,

VA, the LVD logic generates an interrupt. This occurs at

time, TA. The application software then has the time,

until the device voltage is no longer in valid operating

range, to perform “housekeeping tasks” and to shut

down the system. Voltage point, VB, is the minimum

valid operating voltage specification. This occurs at

time, TB. The difference, TB – TA, is the total time for

shutdown.

FIGURE 22-3:

TYPICAL LOW-VOLTAGE DETECT APPLICATION

VA

VB

TA TB

Time

Legend: VA = LVD trip point

VB = Minimum valid device

operating voltage

TABLE 22-1: REGISTERS ASSOCIATED WITH LOW-VOLTAGE DETECT MODULE

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

LVDCON

—

—

IRVST LVDEN

LVDL3

LVDL2

INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE

RBIE

TMR0IF

IPR2

OSCFIP

—

—

EEIP

—

LVDIP

PIR2

OSCFIF

—

—

EEIF

—

LVDIF

PIE2

OSCFIE

—

—

EEIE

—

LVDIE

Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the LVD module.

LVDL1

INT0IF

—

—

—

Bit 0

LVDL0

RBIF

CCP2IP

CCP2IF

CCP2IE

 2010 Microchip Technology Inc.

DS39616D-page 261

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