PIC18LF4331T-IP View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF4331T-IP

28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

Microchip Technology 

PIC18F2331/2431/4331/4431

REGISTER 23-11: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)

U-0

U-0

U-0

U-0

R/P-1

R/P-1

R/P-1

R/P-1

—

—

—

—

EBTR3(1,2,3) EBTR2(1,2,3) EBTR1(2,3) EBTR0(2,3)

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as ‘0’

U = Unchanged from programmed state

bit 7-4

bit 3

bit 2

bit 1

bit 0

Unimplemented: Read as ‘0’

EBTR3: Table Read Protection bit(1,2,3)

1 = Block 3 is not protected from table reads executed in other blocks

0 = Block 3 is protected from table reads executed in other blocks

EBTR2: Table Read Protection bit(1,2,3)

1 = Block 2 is not protected from table reads executed in other blocks

0 = Block 2 is protected from table reads executed in other blocks

EBTR1: Table Read Protection bit(2,3)

1 = Block 1 is not protected from table reads executed in other blocks

0 = Block 1 is protected from table reads executed in other blocks

EBTR0: Table Read Protection bit(2,3)

1 = Block 0 is not protected from table reads executed in other blocks

0 = Block 0 is protected from table reads executed in other blocks

Note 1:

2:

3:

Unimplemented in PIC18F2331/4331 devices; maintain this bit set.

Refer to Figure 23-5 for block boundary addresses.

Enabling the corresponding CPx bit is recommended to protect the block from external read operations.

REGISTER 23-12: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)

U-0

R/P-1

U-0

U-0

U-0

U-0

U-0

U-0

—

EBTRB(1,2)

—

—

—

—

—

—

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

-n = Value when device is unprogrammed

U = Unimplemented bit, read as ‘0’

U = Unchanged from programmed state

bit 7

bit 6

bit 5-0

Unimplemented: Read as ‘0’

EBTRB: Boot Block Table Read Protection bit(1,2)

1 = Boot block is not protected from table reads executed in other blocks

0 = Boot block is protected from table reads executed in other blocks

Unimplemented: Read as ‘0’

Note 1: Enabling the corresponding CPx bit is recommended to protect the block from external read operations.

2: Refer to Figure 23-5 for block boundary addresses.

DS39616D-page 272

 2010 Microchip Technology Inc.

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