PIC18LF2431-I/ML View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18LF2431-I/ML
Microchip Technology
PIC18LF2431-I/ML Datasheet PDF : 392 Pages
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PIC18F2331/2431/4331/4431
ADDWFC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
ADD W and Carry bit to f
[ label ] ADDWFC f [,d [,a]]
0 f 255
d [0,1]
a [0,1]
(W) + (f) + (C) dest
N, OV, C, DC, Z
0010 00da ffff ffff
Add W, the Carry flag and data memory
location, ‘f’. If ‘d’ is ‘0’, the result is placed
in W. If ‘d’ is ‘1’, the result is placed in
data memory location, ‘f’. If ‘a’ is ‘0’, the
Access Bank will be selected. If ‘a’ is ‘1’,
the BSR will not be overridden.
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
ADDWFC
Before Instruction
Carry bit =
REG =
W
=
1
0x02
0x4D
After Instruction
Carry bit =
REG =
W
=
0
0x02
0x50
REG, W
ANDLW
AND Literal with W
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
[ label ] ANDLW k
0 k 255
(W) .AND. k W
N, Z
0000 1011 kkkk kkkk
The contents of W are ANDed with the
8-bit literal ‘k’. The result is placed in W.
1
1
Q2
Read literal
‘k’
Q3
Process
Data
Q4
Write to
W
Example:
ANDLW
Before Instruction
W
=
After Instruction
W
=
0xA3
0x03
0x5F
DS39616D-page 290
2010 Microchip Technology Inc.
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