PIC18LF2431-I/ML View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF2431-I/ML

28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D

Microchip Technology 

PIC18F2331/2431/4331/4431

LFSR

Load FSR

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

Decode

[ label ] LFSR f,k

0f2

0  k  4095

k  FSRf

None

1110

1111

1110 00ff k11kkk

0000 k7kkk kkkk

The 12-bit literal ‘k’ is loaded into the

file select register pointed to by ‘f’.

2

2

Q2

Read literal

‘k’ MSB

Read literal

‘k’ LSB

Q3

Process

Data

Process

Data

Q4

Write

literal ‘k’

MSB to

FSRfH

Write literal

‘k’ to FSRfL

Example:

LFSR 2, 0x3AB

After Instruction

FSR2H

FSR2L

= 0x03

= 0xAB

MOVF

Syntax:

Operands:

Operation:

Status Affected:

Encoding:

Description:

Move f

[ label ] MOVF

0  f  255

d  [0,1]

a  [0,1]

f  dest

N, Z

f [,d [,a]]

0101 00da ffff ffff

The contents of register, ‘f’, are moved

to a destination dependent upon the

status of ‘d’. If ‘d’ is ‘0’, the result is

placed in W. If ‘d’ is ‘1’, the result is

placed back in register, ‘f’. Location, ‘f’,

can be anywhere in the 256-byte bank.

If ‘a’ is ‘0’, the Access Bank will be

selected, overriding the BSR value. If

‘a’ = 1, then the bank will be selected as

per the BSR value.

Words:

Cycles:

Q Cycle Activity:

Q1

Decode

1

1

Q2

Read

register ‘f’

Q3

Process

Data

Example:

MOVF

Before Instruction

REG

=

W

=

After Instruction

REG

=

W

=

REG, W

0x22

0xFF

0x22

0x22

Q4

Write

W

 2010 Microchip Technology Inc.

DS39616D-page 307

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