PIC18LF4682-IP View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC18LF4682-IP
Microchip Technology
PIC18LF4682-IP Datasheet PDF : 484 Pages
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PIC18F2682/2685/4682/4685
REGISTER 9-5: PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
OSCFIF
CMIF(1)
—
EEIF
BCLIF
HLVDIF
TMR3IF
bit 7
R/W-0
ECCP1IF(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
OSCFIF: Oscillator Fail Interrupt Flag bit
1 = Device oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0 = Device clock operating
bit 6
CMIF: Comparator Interrupt Flag bit(1)
1 = Comparator input has changed (must be cleared in software)
0 = Comparator input has not changed
bit 5
Unimplemented: Read as ‘0’
bit 4
EEIF: Data EEPROM/Flash Write Operation Interrupt Flag bit
1 = The write operation is complete (must be cleared in software)
0 = The write operation is not complete or has not been started
bit 3
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision occurred (must be cleared in software)
0 = No bus collision occurred
bit 2
HLVDIF: High/Low-Voltage Detect Interrupt Flag bit
1 = A high/low-voltage condition occurred (must be cleared in software)
0 = The device voltage is above the High/Low-Voltage Detect trip point
bit 1
TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (must be cleared in software)
0 = TMR3 register did not overflow
bit 0
ECCP1IF: ECCP1 Interrupt Flag bit(1)
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
Note 1: These bits are available in PIC18F4682/4685 and reserved in PIC18F2682/2685 devices.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 119
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