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PIC18LF2682-I/P View Datasheet(PDF) - Microchip Technology

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PIC18LF2682-I/P Datasheet PDF : 484 Pages
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PIC18F2682/2685/4682/4685
16.4.5 FULL-BRIDGE MODE
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 16-6.
P1A, P1B, P1C and P1D outputs are multiplexed with
the PORTD<4>, PORTD<5>, PORTD<6> and
PORTD<7> data latches. The TRISD<4>, TRISD<5>,
TRISD<6> and TRISD<7> bits must be cleared to
make the P1A, P1B, P1C and P1D pins outputs.
FIGURE 16-6:
FULL-BRIDGE PWM OUTPUT
Forward Mode
P1A(2)
P1B(2)
Period
Duty Cycle
P1C(2)
P1D(2)
(1)
(1)
Reverse Mode
P1A(2)
Duty Cycle
Period
P1B(2)
P1C(2)
P1D(2)
(1)
(1)
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note 2: Output signal is shown as active-high.
© 2007 Microchip Technology Inc.
Preliminary
DS39761B-page 179

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